Memory devices are typically provided as internal, semiconductor, integrated circuits in computers or other electronic devices. There are many different types of memory including random-access memory (RAM), read only memory (ROM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), and flash memory, among others.
Flash memory devices are utilized as non-volatile memory for a wide range of electronic applications. Flash memory devices typically use a one-transistor memory cell that allows for high memory densities, high reliability, and low power consumption.
Uses for flash memory include memory for personal computers, personal digital assistants (PDAs), digital cameras, and cellular telephones. Program code and system data, such as a basic input/output system (BIOS), are typically stored in flash memory devices. This information can be used in personal computer systems, among others.
Two common types of flash memory array architectures are the “NAND” and “NOR” architectures, so called for the logical form in which the basic memory cell configuration of each is arranged
A NAND array architecture arranges its array of floating gate memory cells in a matrix such that the gates of each floating gate memory cell of the array are coupled by rows to select lines. However each memory cell is not directly coupled to a column sense line by its drain. Instead, the memory cells of the array are coupled together in series, source to drain, between a source line and a column sense line.
Memory cells in a NAND array architecture can be programmed to a desired state. That is, electric charge can be placed on or removed from the floating gate of a memory cell to put the cell into a number of stored states. For example, a single level cell (SLC) can represent two digit, e.g., binary, states, e.g., 1 or 0. Flash memory cells can also store more than two digit states, e.g., 1111, 0111, 0011, 1011, 1001, 0001, 0101, 1101, 1100, 0100, 0000, 1000, 1010, 0010, 0110, and 1110. Such cells may be referred to as multi state memory cells, multidigit cells, or multilevel cells (MLCs). MLCs can allow the manufacture of higher density memories without increasing the number of memory cells since each cell can represent more than one digit, e.g., bit. MLCs can have more than one programmed state, e.g., a cell capable of representing four digits can have sixteen programmed states. For some MLCs, one of the sixteen programmed states can be an erased state. For these MLCs, the lowermost program state is not programmed above the erased state, that is, if the cell is programmed to the lowermost state, it remains in the erased state rather than having a charge applied to the cell during a programming operation. The other fifteen states can be referred to as “non-erased” states.
As NAND flash memory is scaled to smaller sizes, e.g. from 70 nm to 50 nm to 35 nm, the effects of random telegraph signal (RTS) noise, also known as 1/f noise because it is inversely proportional to the frequency f, can become more severe. When a memory cell is sensed, the sensing current can jump due to RTS. For example, if a sensing current typically would be 500 nA, it could jump from 425 nA to 565 nA randomly. These jumps are sometimes referred to as “quantum jumps.” If some cases, quantum jumps can cause sensing errors, e.g., errors in measuring current associated with sensing the state of a memory cell.
The printed publication by Hui Tian and Abbas El Gamal, “Analysis of 1/f Noise in Switched MOSFET Circuits”, IEEE Transactions on Circuits and Systems-II: Analog and Digital Signal Processing, Vol. 38, No. 2, pages 151-157, February 2001, reflects the prevailing theory behind RTS noise, suggesting that it can be caused by forming and filling traps in memory cell gate dielectrics, e.g., silicon-oxide interfaces.
Experimentation has shown that turning a semiconductor device off can release charge carriers, e.g., electrons from traps. Trapped charge carriers can block the flow of other carriers across the dielectric. Forming traps can be a slow process as compared to filling a formed trap. Some operating methods designed to combat RTS noise involve turning the device on and off multiple times, e.g., 100 times, and measuring the average current to determine an approximate variation due to RTS. Such operating methods can result in slower sensing operations.